| 简介 |
ADI的AD9912是集成了14位DAC的直接数字频率合成器(DDS),具有48位频率调整字(FTW),能以不大于4 uHz的步长合成频率,通过调整DAC系统时钟可以获得绝对的频率精度.AD9912还集成了系统时钟PLL,使得系统时钟可低至25MHz,而直接输出频率可高达400MHz.可广泛应用于捷变本地振荡(LO)频率合成,低抖动精调时钟发生器,测试和测量设备,无线基站和控制器,安全通信以及快速跳频.
The AD9912 is a direct digital synthesizer (DDS) featuring an integrated 14-bit DAC. The AD9912 features a 48–bit frequency tuning word (FTW) which can synthesize frequencies in step sizes no larger than 4 uHz. Absolute frequency accuracy can be achieved by adjusting the DAC system clock.
The AD9912 also features an integrated system clock PLL, which allows reference clocks as low as 25 MHz. The AD9912 operates over an industrial temperature range, spanning -40°C to +85°C.
主要特性: 1 GSPS internal clock speed (up to 400 MHz out directly) Integrated 1 GSPS 14-bit DAC 48-bit frequency tuning word Differential HSTL Comparator Flexible System Clock Input accepts either crystal or external reference clock. On-chip Low-Noise PLL REFCLK Multiplier 2 SpurKiller channels Low Jitter clock doubler for frequencies up to 750 MHz Single-ended CMOS Comparator; frequencies < 50MHz Programmable output divider for CMOS output Serial I/O control Excellent Dynamic Performance Software controlled power-down 64-lead LFCSP package Phase Noise @ 95MHz using Vectron VCC6 87.5MHz Oscillator: 100 Hz Offset: -103 dBc/Hz 10 kHz Offset: -133 dBc/Hz 1 MHz Offset: -136 dBc/Hz
应用范围: Agile LO frequency synthesis Low jitter, fine tune clock generation Test and measurement equipment Wireless Base Stations, Controllers Secure Communications Fast frequency hopping
下图为AD9912的方框图:

下图为降噪技术原理图(Spur Reduction Technique):

AD9912数据表:
http://www.analog.com/UploadedFiles/Data_Sheets/AD9912.pdf
下面四张是AD9912评估板应用电路图:

Fig.1

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Fig.4
来源:中电网 |