Freescale公司的无线Dolby耳机DH3参考设计是基于成功的DH1设计,它采用Freescale的DSP56371音频信号处理器件和STS公司的DWAM79无线数字音频模块,支持受欢迎的Dolby Headphone算法.DH3可选择用于Dolby Digital的S/PDIF输入,或采用DTS,PCM比特流或模拟输入.采用2.4GHz无线音频收发器,从而不需要耳机连接线.该参考设计可单独作为游戏机和DVD播放器的附件,也能集成到目前的消费类电子产品如电视,DVD接收机,音/视频接收器和汽车娱乐产品.该参考设计的核心是Symphony DSP56371.本文提供了DSP56371的主要性能,方框图以及STS公司的DWAM79模块的主要性能和方框图,同时还提供了DH3的参考设计的方框图.

Eliminate Wires With the Wireless Dolby Headphone Reference Design Freescale was one of the first to create a reference design to support the popular Dolby Headphone algorithm using the Symphony DSP56371. The popular DH1 reference design is a cost-effective and space-efficient solution for Dolby Headphone surround sound products.
The design enables manufacturers to build a stand-alone accessory device for products
such as game consoles and DVD players at an extremely competitive price point with other products on the market today.

Following the success of the DH1, Freescale has teamed up with STS to expand the DH1
reference design by including a 2.4GHz wireless audio transceiver to eliminate the need for headphone wires. The advanced reference design is called the DH3.

The figure below shows the high-level diagram of how the DH3 works. The DH3 accepts either an optical S/PDIF input for Dolby Digital, DTS or PCM bit stream or an analog input. The DSP decodes the bit stream and then applies the Dolby Headphone algorithm through post processing to create a virtualized stereo signal. The DSP can also take a stereo input and expand the signal from two channels to 5.1 channels using Dolby Pro Logic® II before virtualizing the signal. The virtualized stereo signal is then output to the STS DWAM79 module which takes the audio signal and handles the 2.4GHz wireless transmission to the wireless headphones (wireless receiver in the headphone).

The heart of this reference design is the Symphony DSP56371. In order to serve
the specific needs of consumer and automotive applications, the DSP56371 includes a powerful set of built-in audio peripherals and embedded software modules, plus a wealth of audio processing functions, including a plug and play software architecture system, various equalization algorithms, compression, signal generator, tone control, fade/balance, level meter/spectrum analyzer and many more.

参考设计尺寸:
3 x 3 inches, plus STS DWAM79 module
主要特性:
Dolby Digital Decoder
DTS Decoder
Dolby Pro Logic II Post Processing
Dolby Headphone Post Processing
DTS Neo6 Post Processing
Entire user interface handled by
Symphony™ DSP56371 (No MCU)
STS DWAM79 2.4GHz wireless audio transceiver
Integrated S/PDIF transceiver



图1.无线Dolby耳机DH3参考设计方框图.

DH3参考设计详情请见:

href=http://www.freescale.com/files/wireless_comm/doc/fact_sheet/STSCOFS.pdf?fsrch=1
>http://www.freescale.com/files/wireless_comm/doc/fact_sheet/STSCOFS.pdf?fsrch=1


下面介绍DWAM79模块的主要性能:
The DWAM79 OEM module realizes a 4 channels CD quality uncompressed wireless audio link in the worldwide license exempt 2.4Ghz band. It implements 4 channels with
I2S interface or 2 channels with S/PDIF. The module hosts the DARR79 baseband, radio and audio processor chip, a standard 802.11 RF front end, other components and connectors and a PCB trace antenna. The DWAM79 is a true wireless audio platform, digital or analog inputs, low latency for real time audio, fi xed end-to-end delay and multichannel synchronization for surround, stereo, long range multiroom, low power headphone and portable applications. Unparalled QoS is underpinned by industry-leading interference robustness and co-existence.





图2.DWAM79模块外形兔图.



图3.DWAM79模块方框图.

href=http://www.freescale.com/files/wireless_comm/doc/fact_sheet/STSCOFS.pdf?fsrch=1
>http://www.freescale.com/files/wireless_comm/doc/fact_sheet/STSCOFS.pdf?fsrch=1


下面是参考设计核心器件DSP56371的主要性能介绍.

Targeted at audio/video (AV) receivers, home theaters, surround sound decoders, mini stereo systems, digital TV audio systems and automotive audio systems, the DSP56371 is designed to meet the demands of audio electronics system designers by supporting the latest generation decoders, such as Dolby, THX and DTS, among others.
The DSP56371 is capable of running delay management, bass management and DTS96/24 while using less than half of the DSPs computing capability. This enables designers to add system enhancements that the discerning audio consumer now expects. The performance increase is made possible through the use of a higher core frequency, fewer memory wait states, a larger amount of on-chip static random access memory (SRAM) and the addition of an Enhanced Filter Coprocessor (EFCOP). By removing the need for external high-speed SRAM and making smaller, less complex boards, the DSP56371 is performance-rich and cost-effective.

主要特性:

Multimode, multichannel decoder software functionality
Dolby and/or DTS license required
Prologic II
DTS Neo6
DTS 2.3
WMA
AAC
Dolby Headphone (DH)
Dolby Virtual Speaker (DVS)
Digital audio post-processing capabilities
Parametric EQ
Tone Control or Graphic EQ
Dynamic range compression
Loudness
Bass Boost
Speaker Comp
Fade/Balance
Music Search
Compression
Digital Signal Processing Core
1.25 V core with a 3.3 V peripheral I/O
Object Code Compatible with the DSP56000 core with highly parallel instruction set  
Data ALU with a 24 x 24 bit multiplier-accumulator and a 56-bit barrel shifter. 16-bit arithmetic support
Program Control with position independent code support and instruction cache support
Six-channel DMA controller
PLL based clocking with a wide range of frequency multiplications (1 to 255), predivider factors (1 to 3) and power saving clock divider (2I: i=0 to 7). Reduces clock noise
Internal address tracing support and OnCETM for Hardware/Software debugging
JTAG port
Very low-power CMOS design, fully static design with operating frequencies down to DC
STOP and WAIT low-power standby modes
EFCOP running concurrently with core
On-chip Memory Configuration
16K - 48Kx24 Bit Y-Data RAM and 32Kx24 Bit Y-Data ROM
36Kx24 Bit X-Data RAM and 32Kx24 Bit X-Data ROM
28K - 64Kx24 Bit Program and bootstrap ROM
4Kx24 Bit Program RAM
Various memory switches available  
Peripheral modules
Enhanced Serial Audio Interface (ESAI_0): up to 4 receivers and up to 6 transmitters, master or slave. I2S, Sony, AC97, network and other programmable protocols.
Enhanced Serial Audio Interface I (ESAI_1): up to 4 receivers and up to 6 transmitters, master or slave. I2S, Sony AC97, network and other programmable protocols.

Serial Host Interface (SHI): SPI and I2C protocols, 10-word receive FIFO, support for 8, 16 and 24-bit words.
Triple Timer module
Digital Audio Transmitter (DAX): 1 serial transmitter capable of supporting the SPDIF, IEC958, CP-340 and AES/EBU digital audio formats
Pins of unused peripherals (except SHI) may be programmed as GPIO lines

The DSP56371 is targeted to applications that require digital audio compression/decompression, sound field processing, acoustic equalization and other
digital audio algorithms. Changes in core functionality specific to the DSP56371 are also described in this manual. See Figure 1. for the block diagram of the DSP56371.



图1.DSP56371方框图.

The DSP56371 uses the DSP56300 core, a high-performance, single clock cycle per instruction engine that provides up to twice the performance of Motorolas popular DSP56000 core family while retaining code compatibility with it.

The DSP56300 core provides the following functional blocks:
Data arithmetic logic unit (Data ALU)
Address generation unit (AGU)
Program control unit (PCU)
DMA controller (with six channels)
Instruction patch controller
PLL-based clock oscillator
OnCE module
Memory

详情请见:

http://www.freescale.com/files/dsp/doc/data_sheet/DSP56371.pdf?pspll=1

来源：中电网